digital fundamentals 10th edition answers

Assume the latch is initially RESET (Q = 0) and the inputs are at their inactive level (1). Latch initially SET 1Ĥ Summary Latches The active-LOW S-R latch is in a stable (latched) condition when both inputs are HIGH. Latch initially RESET 1 R S Q 1 To RESET the latch (Q = 0), a momentary HIGH signal is applied to the R input while the S remains LOW. To SET the latch (Q = 1), a momentary HIGH signal is applied to the S input while the R remains LOW. R S Q 1 Assume the latch is initially RESET (Q = 0) and the inputs are at their inactive level (0).

R S Q Q Q Q S R NOR Active-HIGH Latch NAND Active-LOW Latchģ Summary Latches The active-HIGH S-R latch is in a stable (latched) condition when both inputs are LOW. With NOR gates, the latch responds to active-HIGH inputs with NAND gates, it responds to active-LOW inputs. It can be constructed from NOR gates or NAND gates. The S-R (Set-Reset) latch is the most basic type. Presentation on theme: 'Digital Fundamentals Floyd Chapter 7 Tenth Edition'- Presentation transcript:ġ Digital Fundamentals Floyd Chapter 7 Tenth EditionĢ Summary Latches A latch is a temporary storage device that has two stable states (bistable).

Digital fundamentals 10th edition answers